(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a method used to fabricate a lateral N/P photodiode element for an image sensor cell.
(2) Description of Prior Art
Active pixel, or image sensor cells, are usually comprised with a photodiode element, used to collect photon energy for the cell. The efficiency, or sensitivity of the photon collector, or the photodiode element, usually comprised of a N/P diode, is directly related to the depletion region of this diode. The depletion region in turn is a function of the doping level of the components of the N/P photodiode element, as well as a function of the area of the photodiode. However trends to micro-miniaturization have resulted in decreasing space allotted for the image censor cell, and thus smaller area, less efficient photodiode elements have to used.
This invention will describe a novel method for fabricating a CMOS image sensor device, using a process sequence that can be simultaneously used to form other CMOS devices, used for logic and memory applications. This invention however will feature the formation of a lateral N/P photodiode element, exhibiting an increased depletion region, when compared to other lateral N/P photodiodes, fabricated without the use of the processes described in this invention. Prior art, such as Chen, in U.S. Pat No. 5,880,495, describes a method of fabricating a photodiode element for an image sensor cell, however that prior art does not teach the process needed to fabricate the lateral N/P photodiode element, described in this present invention, in which an increased depletion region, and thus increased photosensitivity, is realized via the placement of a lightly doped, or of an intrinsic region, at the interface between the N type, and P type regions of the lateral N/P photodiode element.